Can we rely on future AI ICs?- Robustness design as key challenge for system technology co-optimization (STCO)
21st November 2024
Timing : 1 pm ET
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For a list of all talks at the NanoBio seminar Series Fall'24, see here
Most advanced AI ICs components will require downscaled technologies beyond 2 nm and massive heterogeneous integration on package level to satisfy the power-performance need of future AI applications. They will be applied in safety critical and rough environments like for autonomous vehicles where high reliability standards need to be fulfilled for the system. On the level of the IC design minute dimensions and complex integration schemes of Die-to-Die interfaces in the Millions will make the IC more and more susceptible to thermo-mechanical and electrical stress conditions. A careful co-design of system measures and IC design have to be applied based on the deep understanding of the physical phenomena and the proper characterization and modelling of the IC components. The talk will sketch out the technology trends and the resulting challenges for robustness design. Two examples of electrical stress (ESD) and thermo-mechanical (warpage) will highlight the current effort of industry to comply with these needs.